Posted: Wednesday, February 7, 2018 10:41 PM
Seeking a self:motivated, team:oriented high:speed board design engineer to develop Micron's next generation Solid State Drive (SSD) products. This position requires experience in hardware architecture, design, signal integrity; including modeling and simulation for high speed signaling implementations. A successful candidate will have a good working knowledge of: state of the art memory device technologies, interfaces such as SATA, SAS, PCIe Gen 3 and 4, ONFI and implementation techniques required for high:speed interfaces. Experience with PCB design tools (Cadence PCB design and analysis, including Si/Pi. Expertise in the design for optimum signal integrity as well as hands:on lab experience is a must. Also, a thorough understanding of hardware development methodologies to achieve a first pass design success.
Duties and Responsibilities:/h2:
:Interface in cross functional teams to ensure the design meets all firmware, diagnostic and system level requirements.
:Participate in architecture definition, design reviews, requirements generation of SSD products.
:Perform basic SI measurements, such as TDR, TDT, crosstalk, jitter, eye pattern and power plane noise measurements to validate SI and power integrity (PI) designs.
:Document and communicate results with cross functional counterparts.
:Simulate and analyze design proposals, review results and provide recommendations on optimal design practices to other design engineers.
:Experienced in designing hardware for large scale manufacture, including DFx and low cost considerations
:Hardware design, worst:case analysis, simulations, capture schematic, de:rating and assumes complete ownership of the SSD hardware thru the product lifecycle.
:PCB back:end process: defining stack:up and via technologies, part placement, setting design constraints, signal integrity and power integrity analysis
:Works proactively with cross functional team members during design, verificationas well as on RMAs
:In addition to design, a successful candidate will mentor and provide technical guidance to other hardware team members
:Self:motivated. Desire to take on challenges. Result:driven and details oriented.
:Strong interpersonal and communication skills are a must.
:Strong in transmission line fundamentals. Understand the fundamentals of time:domain vs. frequency:domain.
:In depth knowledge in circuit designs, as well as semiconductor design.
:Good PCB design experience on high speed signals routing guideline and review, power copper routing and review, design for EMI/ESD protection.
:Design for signal integrity, including SerDes, power and interconnect.
:Develops solutions to complex signal integrity problems, which require ingenuity and creativity.
:Simulation skills with SPICE and IBIS. Experience with Hspice.
:Practical experience with design tools:
:Cadence Sigrity, Allegro Power:Aware SI
:Mentor Graphics HyperLynx
:Practical lab SI analysis experience using:
:High:bandwidth measurements (20:35GHz) via:
:Teledyne Lecroy SDA820Zi:B Oscilloscope
:Agilent MSO:X 92004A Oscilloscope
:PCIe Compliance equipment (requires also using one of the following test equipment)
:Teledyne Lecroy PER:R008:S01:X Protocol Aware Bit Error Rate Tester
:Keysight J:BERT M8041A Protocol Aware Bit Error Rate Tester
:BS in Electrical Engineering required; MS in Electrical Engineering is preferred
:10+ years of relevant design experience
:Excellent written and verbal communication
:Excellent problem solving skills
:Boise Idaho or Longmont Colorado or Folsom California
We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a persons race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veterans status, or other classifications protected under law.
• Location: folsom, Sacramento
• Post ID: 21764567 sacramento